Download 17mb100 Service Manual PDF

Title17mb100 Service Manual
File Size11.3 MB
Total Pages83
Table of Contents
                            block_diagram_mb100.pdf
	Page 1
17mb100-r3a1.pdf
	17mb100-r1 Sheet POWER
	17mb100-r1 Sheet TUNER
	17mb100-r1 Sheet SAT_TUNER
	17mb100-r1 Sheet DEMODS_RTC
	17mb100-r1 Sheet AV_INOUT_SUBW
	17mb100-r1 Sheet VIDEO_LED
	17mb100-r1 Sheet AUDIO
	17mb100-r1 Sheet CI_TS
	17mb100-r1 Sheet USB_GPIO
	17mb100-r1 Sheet HDMI_SPI
	17mb100-r1 Sheet LVDS
	17mb100-r1 Sheet MSTAR_SUPPLY_GND
	17mb100-r1 Sheet MSTAR_DDR
	17mb100-r1 Sheet MSTAR_DDR_2
	17mb100-r1 Sheet MSTAR_DDR_3
	17mb100-r1 Sheet MFC_POWER_GND_DDR
	17mb100-r1 Sheet MFC_DDR
	17mb100-r1 Sheet MFC_LVDS_VBY1
service manual_örnek kapak_OEM_MB100.pdf
	Page 1
                        
Document Text Contents
Page 1

MB100 IDTV
SERVICE MANUAL

Page 2

1


Table of Contents

1. INTRODUCTION .......................................................................................................................................................... 2

2. TUNER ........................................................................................................................................................................... 2

A. SI2157 TerrestrIal and Cable TV Tuner ...................................................................................................................... 2

B. M88TS2022 Satellıte Tuner ........................................................................................................................................ 5

3. AUDIO AMPLIFIER STAGES ...................................................................................................................................... 6

A. MAIN AMPLIFIER (TAS5719) ...................................................................................................................................... 6

B. HEAD-PHONE AMPLIFIER STAGE .............................................................................................................................. 10

C. SUBWOOFER AMPLIFIER STAGE .............................................................................................................................. 11

4. POWER STAGE ........................................................................................................................................................... 16

5. MICROCONTROLLER (MSTAR MSD95C0H) ......................................................................................................... 30

6. VIDEO BACK-END PROCESSOR (MSTAR) ........................................................................................................... 37

7. 1Gb DDR3 SDRAM ..................................................................................................................................................... 41

8. 2Gb DDR3 SDRAM ..................................................................................................................................................... 42

9. 32Gbit (4G x 8 bit) NAND Flash Memory ................................................................................................................... 43

10. 16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM ............................................................................................ 45

11. Demodulator Stage ........................................................................................................................................................ 49

12. LNB supply and control IC ........................................................................................................................................... 53

13. Troubleshootıng ............................................................................................................................................................ 54

A. No Backlıght Problem .............................................................................................................................................. 54

D. CI Module Problem .................................................................................................................................................. 56

E. Stayıng ın Stand-by Mode ........................................................................................................................................ 58

F. IR Problem ................................................................................................................................................................ 58

G. Keypad Touchpad Problems .................................................................................................................................... 59

H. USB Problems ........................................................................................................................................................... 59

İ. No Sound Problem ................................................................................................................................................... 60

J. Standby On/Off Problem ......................................................................................................................................... 61

K. No Sıgnal Problem .................................................................................................................................................... 61

14. General Block Dıagram ................................................................................................................................................ 63

15. PLACEMENT OF BLOCKS ........................................................................................................................................ 64

Page 41

40





Block Diagram



Figure: Block diagram

Page 42

41


7. 1GB DDR3 SDRAM


HYNIX H5TQ1G63DFR


Description


The H5TQ1G63DFR-xxx series are a 1,073,741,824-bit CMOS Double Data Rate III (DDR3) Synchronous
DRAM, ideally suited for the main memory applications which requires large memory density and high
bandwidth. Hynix 1Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and
falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK
(falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling
edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.


Features


 DQ Power & Power supply : VDD & VDDQ = 1.5V +/- 0.075V
 DQ Ground supply : VSSQ = Ground
 Fully differential clock inputs (CK, CK) operation
 Differential Data Strobe (DQS, DQS)
 On chip DLL align DQ, DQS and DQS transition with CK transition
 DM masks write data-in at the both rising and falling edges of the data strobe
 All addresses and control inputs except data, data strobes and data masks latched on the rising edges of

the clock
 Programmable CAS latency 6, 7, 8, 9, 10, 11, 12, 13 and 14 supported
 Programmable additive latency 0, CL-1, and CL-2 supported
 Programmable CAS Write latency (CWL) = 5, 6, 7, 8, 9, 10
 Programmable burst length 4/8 with both nibble sequential and interleave mode
 Programmable PASR(Partial Array Self-Refresh) for Digital consumer Applications.
 Programmable BL=4 supported (tCCD=2CLK) for Digi-tal consumer Applications.
 Programmable ZQ calibration supported
 BL switch on the fly
 8banks
 8K refresh cycles/64ms
 JEDEC standard 96ball FBGA(x16)
 Driver strength selected by EMRS
 Dynamic On Die Termination supported
 Asynchronous RESET pin supported
 Auto Self Refresh supported
 Write Levelization supported
 On Die Thermal Sensor supported
 8 bit pre-fetch

Page 82

100R
R911

100R
R616

1
2
3
4 5

6
7
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R2
R3
R4

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16-07-2014_16:14

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B

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MP20073DH

1

2

3

4

8

7

6

5VDRV

REF

EN

VTTREF

VTTSEN

GND

VTT

DDQ

100k
R739

3V3_VCC

22R
R341

4u7
10V

C2265

C
1
2
4
2

1
0
0
n


3V3_VCC

C1243

16V
100n

C1244
100n
16V

C2269
10u
10V

C2270
10u
10V

10V
10u
C2271

10V
10u
C2272

1V5_VCC

1
0
0
n


1
6
V

C
1
2
4
5

16V
100n

C1246

1V5_VCC

DDR_VTT_MFC9

AB_A0
AB_A1

AB_A6

AB_A12

AB_A15

AB_A2
AB_A3

AB_A5

AB_A7

AB_A9

AB_A13

AB_A8

AB_A14

AB_A11

AB_A4

AB_A10

AB_BA0

AB_BA2
AB_BA1

AB_MCLK
AB_MCLKZ

AB_CKE

AB_RASZ
AB_CASZ

AB_A2
AB_A3

AB_A1
AB_A0

AB_A7
AB_A6
AB_A5
AB_A4

AB_A11
AB_A10
AB_A9
AB_A8

AB_A15

AB_A14

1
k

R
7
4
8

AB_AVDD

R749
1k

C1649
100n
10V

C1511
1n
50V

B_REF_DQ

1
k

R
7
5
0

AB_AVDD

R751
1k

C1650
100n
10V

C1512
1n
50V

A_REF_DQ

1
k

R
7
5
2

CD_AVDD

R753
1k

C1651
100n
10V

C1513
1n
50V

C_REF_DQ

1
k

R
7
5
4

CD_AVDD

R755
1k

C1652
100n
10V

C1514
1n
50V

10V
100n
C1653

10V
100n
C1654

10V
100n
C1655

10V
100n
C1656

10V
100n
C1657

10V
100n
C1658

10V
100n
C1659 C1660

10V
100n 100n

10V

C1661
100n
C1662

10V

C1663
100n
10V

C1664
100n
10V

CD_AVDD

C1665
100n
10V

100n
10V

C1666 C1667
100n
10V

C1668
100n
10V

C1669
100n
10V 10V

100n
C1670 C1671

10V
100n

C1672

10V
100n

C1673

10V
100n

C1674
100n
10V

100n
C1675

10V 10V
100n
C1676

CD_AVDD

10V

C2050
10u

F52

60R

10V
100n
C1677

10V

C1678
100n

10V
100n
C1679

100n
10V

C1680

10V
100n
C1681 C1682

100n
10V

C1683
100n
10V

100n
C1684

10V 10V
100n
C1685

100n
C1686

10V10V

C2051
10u

1V5_VCC CD_AVDD

10V
100n
C1687 C1688

100n
10V 10V

100n
C1689 C1690

100n
10V 10V

100n
C1691 C1692

100n
10V

C1693
100n
10V

100n
10V

C1694 C1695

10V
100n

C1696
100n
10V 10V

100n
C1697

AB_AVDD

10V
100n
C1698

10V
100n
C1699

10V
100n
C1700

10V
100n
C1701

10V
100n
C1702

100n
C1703

10V 10V
100n
C1704 C1705

10V
100n

10V
100n
C1706

10V
100n
C1707

10V

C1708
100n

AB_AVDD

C2052
10u
10V 10V

100n
C1709

100n
10V

C1710 C1711

10V
100n

10V
100n
C1712

100n
C1713

10V
100n
C1714

10V

C1715

10V
100n

C1716
100n
10V10V

100n
C1717

F53

60R
C2053

10V
10u

AB_AVDD1V5_VCC

H5TQ2G63BFR-PB
U34

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

J1
L1
M7
L9
T7
J9

M2
N8
M3

J7
K7

K9

L2

J3
K3
L3

T2
L8

H
9
H
2
F
1
E
9
D
2
C
9
C
1
A
8
A
1

R
9
R
1
N
9
N
1
K
8
K
2
G
7
D
9
B
2

H1
M8

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

F3
G3

B7
C7

E7
D3

K1

G
9

G
1

F
9

E
8

E
2

D
8

D
1

B
9

B
1

T
9

T
1

P
9

P
1

M
9

M
1

J
8

J
2

G
8

E
1

B
3

A
9

V
S
S
_
1

V
S
S
_
2

V
S
S
_
3

V
S
S
_
4

V
S
S
_
5

V
S
S
_
6

V
S
S
_
7

V
S
S
_
8

V
S
S
_
9

V
S
S
_
1
0

V
S
S
_
1
1

V
S
S
_
1
2

V
S
S
Q
_
1

V
S
S
Q
_
2

V
S
S
Q
_
3

V
S
S
Q
_
4

V
S
S
Q
_
5

V
S
S
Q
_
6

V
S
S
Q
_
7

V
S
S
Q
_
8

V
S
S
Q
_
9

ODT

DMU
DML

DQSU_0
DQSU_1

DQSL_1
DQSL_0

DQU7
DQU6
DQU5
DQU4
DQU3
DQU2
DQU1
DQU0

DQL7
DQL6
DQL5
DQL4
DQL3
DQL2
DQL1
DQL0

VREF_CA
VREF_DQ

V
D
D
_
1

V
D
D
_
2

V
D
D
_
3

V
D
D
_
4

V
D
D
_
5

V
D
D
_
6

V
D
D
_
7

V
D
D
_
8

V
D
D
_
9

V
D
D
Q
_
1

V
D
D
Q
_
2

V
D
D
Q
_
3

V
D
D
Q
_
4

V
D
D
Q
_
5

V
D
D
Q
_
6

V
D
D
Q
_
7

V
D
D
Q
_
8

V
D
D
Q
_
9

ZQ
RESET

WE
CAS
RAS

CS

CKE

CK_1
CK_0

BA2
BA1
BA0

NC6
NC5
NC4
NC3
NC2
NC1

A13
A12/BC
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

16V

C1547

10n

5
6
R

R
7
9
9

5
6
R

R
8
0
0

CD_AVDD

C_REF_DQ

C_DQL5

C_DQL7

C_DQL1

C_DQL3

C_DML

C_DQU2

C_DQSUB

C_DQU4

C_DQU0

C_DQU6

C_DQSU

C_DQSLB

C_DQSL

C_DQU1

C_DMU

C_DQU5

C_DQU3

C_DQU7

C_DQL0

C_DQL2

C_DQL6

C_DQL4

240R
R809

H5TQ2G63BFR-PB
U35

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

J1
L1
M7
L9
T7
J9

M2
N8
M3

J7
K7

K9

L2

J3
K3
L3

T2
L8

H
9
H
2
F
1
E
9
D
2
C
9
C
1
A
8
A
1

R
9
R
1
N
9
N
1
K
8
K
2
G
7
D
9
B
2

H1
M8

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

F3
G3

B7
C7

E7
D3

K1

G
9

G
1

F
9

E
8

E
2

D
8

D
1

B
9

B
1

T
9

T
1

P
9

P
1

M
9

M
1

J
8

J
2

G
8

E
1

B
3

A
9

V
S
S
_
1

V
S
S
_
2

V
S
S
_
3

V
S
S
_
4

V
S
S
_
5

V
S
S
_
6

V
S
S
_
7

V
S
S
_
8

V
S
S
_
9

V
S
S
_
1
0

V
S
S
_
1
1

V
S
S
_
1
2

V
S
S
Q
_
1

V
S
S
Q
_
2

V
S
S
Q
_
3

V
S
S
Q
_
4

V
S
S
Q
_
5

V
S
S
Q
_
6

V
S
S
Q
_
7

V
S
S
Q
_
8

V
S
S
Q
_
9

ODT

DMU
DML

DQSU_0
DQSU_1

DQSL_1
DQSL_0

DQU7
DQU6
DQU5
DQU4
DQU3
DQU2
DQU1
DQU0

DQL7
DQL6
DQL5
DQL4
DQL3
DQL2
DQL1
DQL0

VREF_CA
VREF_DQ

V
D
D
_
1

V
D
D
_
2

V
D
D
_
3

V
D
D
_
4

V
D
D
_
5

V
D
D
_
6

V
D
D
_
7

V
D
D
_
8

V
D
D
_
9

V
D
D
Q
_
1

V
D
D
Q
_
2

V
D
D
Q
_
3

V
D
D
Q
_
4

V
D
D
Q
_
5

V
D
D
Q
_
6

V
D
D
Q
_
7

V
D
D
Q
_
8

V
D
D
Q
_
9

ZQ
RESET

WE
CAS
RAS

CS

CKE

CK_1
CK_0

BA2
BA1
BA0

NC6
NC5
NC4
NC3
NC2
NC1

A13
A12/BC
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

AB_AVDD

A_REF_DQ

A_DQL5

A_DQL7

A_DQL1

A_DQL3

A_DML

A_DQU2

A_DQSUB

A_DQU4

A_DQU0

A_DQU6

A_DQSU

A_DQSLB
A_DQSL

A_DQU1

A_DMU

A_DQU5

A_DQU3

A_DQU7

A_DQL0

A_DQL2

A_DQL6

A_DQL4

R810
240R

U36
H5TQ2G63BFR-PB

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

J1
L1
M7
L9
T7
J9

M2
N8
M3

J7
K7

K9

L2

J3
K3
L3

T2
L8

H
9

H
2

F
1

E
9

D
2

C
9

C
1

A
8

A
1

R
9

R
1

N
9

N
1

K
8

K
2

G
7

D
9

B
2

H1
M8

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

F3
G3

B7
C7

E7
D3

K1

G
9
G
1
F
9
E
8
E
2
D
8
D
1
B
9
B
1

T
9
T
1
P
9
P
1
M
9
M
1
J
8
J
2
G
8
E
1
B
3
A
9

V
S
S
_
1

V
S
S
_
2

V
S
S
_
3

V
S
S
_
4

V
S
S
_
5

V
S
S
_
6

V
S
S
_
7

V
S
S
_
8

V
S
S
_
9

V
S
S
_
1
0

V
S
S
_
1
1

V
S
S
_
1
2

V
S
S
Q
_
1

V
S
S
Q
_
2

V
S
S
Q
_
3

V
S
S
Q
_
4

V
S
S
Q
_
5

V
S
S
Q
_
6

V
S
S
Q
_
7

V
S
S
Q
_
8

V
S
S
Q
_
9

ODT

DMU
DML

DQSU_0
DQSU_1

DQSL_1
DQSL_0

DQU7
DQU6
DQU5
DQU4
DQU3
DQU2
DQU1
DQU0

DQL7
DQL6
DQL5
DQL4
DQL3
DQL2
DQL1
DQL0

VREF_CA
VREF_DQ

V
D
D
_
1

V
D
D
_
2

V
D
D
_
3

V
D
D
_
4

V
D
D
_
5

V
D
D
_
6

V
D
D
_
7

V
D
D
_
8

V
D
D
_
9

V
D
D
Q
_
1

V
D
D
Q
_
2

V
D
D
Q
_
3

V
D
D
Q
_
4

V
D
D
Q
_
5

V
D
D
Q
_
6

V
D
D
Q
_
7

V
D
D
Q
_
8

V
D
D
Q
_
9

ZQ
RESET

WE
CAS
RAS

CS

CKE

CK_1
CK_0

BA2
BA1
BA0

NC6
NC5
NC4
NC3
NC2
NC1

A13
A12/BC
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

240R
R811

D_DQL4

D_DQL6

D_DQL2

D_DQL0

D_DQU7

D_DQU3

D_DQU5

D_DMU

D_DQU1

D_DQSL
D_DQSLB

D_DQSU

D_DQU6

D_DQU0

D_DQU4

D_DQSUB

D_DQU2

D_DML

D_DQL3

D_DQL1

D_DQL7

D_DQL5

U37
H5TQ2G63BFR-PB

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

J1
L1
M7
L9
T7
J9

M2
N8
M3

J7
K7

K9

L2

J3
K3
L3

T2
L8

H
9

H
2

F
1

E
9

D
2

C
9

C
1

A
8

A
1

R
9

R
1

N
9

N
1

K
8

K
2

G
7

D
9

B
2

H1
M8

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

F3
G3

B7
C7

E7
D3

K1

G
9
G
1
F
9
E
8
E
2
D
8
D
1
B
9
B
1

T
9
T
1
P
9
P
1
M
9
M
1
J
8
J
2
G
8
E
1
B
3
A
9

V
S
S
_
1

V
S
S
_
2

V
S
S
_
3

V
S
S
_
4

V
S
S
_
5

V
S
S
_
6

V
S
S
_
7

V
S
S
_
8

V
S
S
_
9

V
S
S
_
1
0

V
S
S
_
1
1

V
S
S
_
1
2

V
S
S
Q
_
1

V
S
S
Q
_
2

V
S
S
Q
_
3

V
S
S
Q
_
4

V
S
S
Q
_
5

V
S
S
Q
_
6

V
S
S
Q
_
7

V
S
S
Q
_
8

V
S
S
Q
_
9

ODT

DMU
DML

DQSU_0
DQSU_1

DQSL_1
DQSL_0

DQU7
DQU6
DQU5
DQU4
DQU3
DQU2
DQU1
DQU0

DQL7
DQL6
DQL5
DQL4
DQL3
DQL2
DQL1
DQL0

VREF_CA
VREF_DQ

V
D
D
_
1

V
D
D
_
2

V
D
D
_
3

V
D
D
_
4

V
D
D
_
5

V
D
D
_
6

V
D
D
_
7

V
D
D
_
8

V
D
D
_
9

V
D
D
Q
_
1

V
D
D
Q
_
2

V
D
D
Q
_
3

V
D
D
Q
_
4

V
D
D
Q
_
5

V
D
D
Q
_
6

V
D
D
Q
_
7

V
D
D
Q
_
8

V
D
D
Q
_
9

ZQ
RESET

WE
CAS
RAS

CS

CKE

CK_1
CK_0

BA2
BA1
BA0

NC6
NC5
NC4
NC3
NC2
NC1

A13
A12/BC
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

D_REF_DQ

CD_AVDD

C
D
_
M
C
L
K
Z

R
8
0
1

5
6
R

R
8
0
2

5
6
R

C1548

10n 16V

AB_AVDD

B_REF_DQ

B_DQL5

B_DQL7

B_DQL1

B_DQL3

B_DML

B_DQU2

B_DQSUB

B_DQU4

B_DQU0

B_DQU6

D_REF_DQ

B_DQSU

B_DQSLB
B_DQSL

B_DQU1

B_DMU

B_DQU5

B_DQU3

B_DQU7

B_DQL0

B_DQL2

B_DQL6

B_DQL4

240R
R812

AB_ODT

TP63

C
D
_
M
C
L
K

A
B
_
M
C
L
K

A
B
_
M
C
L
K
Z

CD_A0

CD_A2
CD_A3

CD_A5

CD_A7

CD_A9

CD_A4

CD_A1

CD_A12
CD_A13

CD_A15

CD_A14

CD_A10
CD_A11

CD_A6

CD_A8

CD_BA1
CD_BA0

CD_BA2

CD_MCLK
CD_MCLKZ

CD_CKE

CD_RESET

CD_RASZ
CD_CASZ
CD_WEZ

CD_A15

CD_ODT
CD_RASZ
CD_CASZ
CD_WEZ

CD_A12

CD_BA2

CD_BA0

CD_A0

CD_A3
CD_A2

CD_A5

CD_A9

CD_A7

CD_A13

CD_RESET

CD_MCLKZ
CD_MCLK

CD_CKE

CD_A10

CD_BA1

CD_A4

CD_A1

CD_A6

CD_A11

CD_A8

CD_A14

CD_CSB2

CD_CSB1

CD_ODT

AB_A13
AB_A12

AB_BA2
AB_BA1
AB_BA0

AB_CSB2

AB_CSB1

AB_MCLKZ
AB_MCLK

AB_RESET

AB_CKE

AB_ODT
AB_WEZ
AB_CASZ
AB_RASZ

AB_WEZ

AB_RESET

C1718

10V
100n

100n
10V

C1719

10V
100n
C1720

100n
C1721

10V

C1722

10V
100n

100n
10V

C1723

C1724

10V
100n

C1725

10V
100n

C1726

10V
100n

C1727
100n
10V

C1728

10V
100n

10V
100n
C1729

C1730

10V
100n

10V
100n
C1731

C1732

10V
100n

100R
R617

1
2
3
4 5

6
7
8R1

R2
R3
R4

R912
100R

100n 10V

C1742

10V
100n

C1743

DDR_VTT_MFC9

CD_ODT
CD_RASZ
CD_CASZ
CD_WEZ

100R
R913

CD_BA0
CD_A12

R914
100R

100R
R915

R916
100R
100R

R917

R918
100R
100R

R919

R920
100R

CD_BA2

100R
R921

CD_A3
CD_A0
CD_A5
CD_A2

R624
100R

1
2
3
4 5

6
7
8R1

R2
R3
R4CD_A7

CD_A9
CD_RESET

CD_A13

100R
R625

1
2
3
4 5

6
7
8R1

R2
R3
R4

CD_MCLK

CD_MCLKZ

100R
R234

R235
100RCD_CKE

100R
R236

CD_A15

CD_A10
CD_BA1
CD_A4
CD_A1

100R
R626

1
2
3
4 5

6
7
8R1

R2
R3
R4CD_A6

CD_A11
CD_A8

CD_A14

R237
100R

C1744

100n
10V

C1745

100n 10V

10V100n

C1746

C1747

100n 10V

AB_CASZ
AB_RASZ

AB_CKE

AB_MCLKZ

AB_MCLK

AB_BA1

AB_BA2

AB_BA0

AB_A10

AB_A4

AB_A11

AB_A14
AB_A8

AB_A13

AB_A9
AB_A7

AB_A5

AB_A3

AB_A2

AB_A15

AB_A12

AB_A6

AB_A1

AB_A0

AB_ODT

AB_RESET

AB_WEZ

R230
100R

R231
100R

100R
R232

R233
100R

R618
100R

1
2
3
4 5

6
7
8R1

R2
R3
R4

100R
R619

1
2
3
4 5

6
7
8R1

R2
R3
R4

R620
100R

1
2
3
4 5

6
7
8R1

R2
R3
R4

100R
R621

1
2
3
4 5

6
7
8R1

R2
R3
R4

DDR_VTT_MFC9

C1733

100n
10V

10V
100n

C1734

C1735

100n 10V

10V100n

C1736

C1737

100n 10V

10V100n

C1738

C1739

100n 10V

10V100n

C1740

C1741

100n 10V

10V100n

C1748

C1749

100n 10V

C1750

100n 10V

ncnc

nc
nc

Close to DDR Power Pin

Close to DDR Power Pin

BOTTOM

BOTTOM

56R OLACAK

Page 83

C2406
100n
10V

10V
100n
C2407

F211 60R

60RF212

F213 60R

60RF214

G6_V0N_MFC

U25
MX25L512

8
7
6
54

3
2
1 CS#

SO
WP#
GND SI

SCLK
HOLD#
VCC

CN61

1

2

3

4

5

6

7

8

9

10

PANEL_VCC

G6_V0P_MFC

G6_V1P_MFC
G6_V1N_MFC

G6_V2N_MFC/V0N/LA0N
G6_V2P_MFC/V0P/LA0P
G6_V3N_MFC/V1N/LA1N
G6_V3P_MFC/V1P/LA1P
G6_V4N_MFC/V2N/LA2N
G6_V4P_MFC/V2P/LA2P

G6_V5N_MFC/V3N/LACLKN
G6_V5P_MFC/V3P/LACLKP
G6_V6N_MFC/V4N/LA3N
G6_V6P_MFC/V4P/LA3P
G6_V7N_MFC/V5N/LA4N

4k7
R46

1k F203

C1574

100p 50V

VDDP_MFC9

MFC_SDA
MFC_SCL

MFC_SCL

MFC_SDA
R238
100R

F2041k
1k F205

F2061k
1k F207

F2081k
1k F209

F2101k

G
6
_
L
B
3
N
/
V
_
L
O
C
K

TP79
TP80
TP81
TP82

TP83

TP84
TP85
TP86
TP87
TP88
TP89
TP90
TP91
TP92

TP93
TP94
TP95

MFC_SPI_WP

G6_V7P_MFC/V5P/LA4P
G6_OSD0N/V6N/LB0N
G6_OSD0P/V6P/LB0P
G6_OSD1N/V7N/LB1N
G6_OSD1P/V7P/LB1P

G6_OSD2N/LB2N
G6_OSD2P/LB2P

G6_0SD3N/LBCLKN
G6_OSD3P/LBCLKP

TX_LF2P
TX_LF2N
TX_LFCLKP
TX_LFCLKN
TX_LF3P
TX_LF3N

TX_LF4N
TX_LF4P

F215 60R

MST7410DY
U30

D2
D1
E1
E2
F3
F2
G2
G1
H3
H1
J3
J2
K3
K2

L3
L1
L2
M3
N3
N2
N1
P3
P2
R3
R2
T3

P6
P5
P4
R6

R4
R5
T6
T5
T4
U6
T1
U3
V5
V6
U1
U2
V3
V2

W3
W2
W1
Y3
Y1
Y2
V4
U5
W6
W5
W4
Y5

AA4
AA5
Y6
AA6
AB6
AB5
AB4
AC5
AC4
AD4
AA2
AB3
AB2
AB1

AC1
AC2
AD3
AD2
AE2
AE1
AF3
AF1
AG3
AG2
AH3
AH2

B8
C8
B7
C7

B6
A6
C6
A5
B5
C5
B4
C4
B3
A3
C3
A2
B2
B1

H4
H5
G5
G6
J6
J5
J4
K6
K4
K5
C2
C1

AK28
AM28
AL28
AK27
AL27
AK26
AL26
AM26
AK25
AM25
AL25
AK24
AL24
AK23
AL23
AM23
AK22
AM22
AL22
AK21
AL21
AK20
AL20
AM20

AK19
AM19
AL19
AK18
AL18
AK17
AL17
AM17
AK16
AM16
AL16
AK15

AL15
AK14
AL14
AM14
AK13
AM13
AL13
AK12
AL12
AK11
AL11
AM11 RB0N

RB0P
RB1N
RB1P
RB2N
RB2P
RBCKN
RBCKP
RB3N
RB3P
RB4N
RB4P

RC0N
RC0P
RC1N
RC1P
RC2N
RC2P
RCCKN
RCCKP
RC3N
RC3P
RC4N
RC4P

VBY1_RXM[0]
VBY1_RXP[0]
VBY1_RXM[1]
VBY1_RXP[1]
VBY1_RXM[2]
VBY1_RXP[2]
VBY1_RXM[3]
VBY1_RXP[3]
VBY1_RXM[4]
VBY1_RXP[4]
VBY1_RXM[5]
VBY1_RXP[5]
VBY1_RXM[6]
VBY1_RXP[6]
VBY1_RXM[7]
VBY1_RXP[7]
VBY1_RXM[8]
VBY1_RXP[8]
VBY1_RXM[9]
VBY1_RXP[9]
VBY1_RXM[10]
VBY1_RXP[10]
VBY1_RXM[11]
VBY1_RXP[11]

LVG0P
LVG0N
LVG1P
LVG1N
LVG2P
LVG2N
LVGCKP
LVGCKN
LVG3P
LVG3N
LVG4P
LVG4N

LVH0P
LVH0N
LVH1P
LVH1N
MOD_GPIO10
MOD_GPIO11
LVH2P
LVH2N
LVHCKP
LVHCKN
LVH3P
LVH3N
VBY_LOCKN/LVH4P
VBY_HTPDN/LVH4N

MOD_GPIO12
MOD_GPIO13
MOD_GPIO14
MOD_GPIO15

VBY0N/LVA0P
VBY0P/LVA0N
VBY1N/LVA1P
VBY1P/LVA1N
VBY2N/LVA2P
VBY2P/LVA2N

VBY3N/LVACKP
VBY3P/LVACKN
VBY4N/LVA3P
VBY4P/LVA3N
VBY5N/LVA4P
VBY5P/LVA4N

VBY6N/LVB0P
VBY6P/LVB0N
VBY7N/LVB1P
VBY7P/LVB1N
MOD_GPIO0
MOD_GPIO1

LVB2P
LVB2N

LVBCKP
LVBCKN
LVB3P
LVB3N
LVB4P
LVB4N

LVC0P
LVC0N
LVC1P
LVC1N
LVC2P
LVC2N

LVCCKP
LVCCKN
LVC3P
LVC3N
LVC4P
LVC4N

LVD0P
LVD0N
LVD1P
LVD1N

MOD_GPIO2
MOD_GPIO3

LVD2P
LVD2N

LVDCKP
LVDCKN
LVD3P
LVD3N
LVD4P
LVD4N

MOD_GPIO4
MOD_GPIO5
MOD_GPIO6
MOD_GPIO7

VBY8N/LVE0P
VBY8P/LVE0N
VBY9N/LVE1P
VBY9P/LVE1N

VBY10N/LVE2P
VBY10P/LVE2N
VBY11N/LVECKP
VBY11P/LVECKN
VBY12N/LVE3P
VBY12P/LVE3N
VBY13N/LVE4P
VBY13P/LVE4N

VBY14N/LVF0P
VBY14P/LVF0N
VBY15N/LVF1P
VBY15P/LVF1N

VBY16N
VBY16P

VBY17N/LVF2P
VBY17P/LVF2N
VBY18N/LVFCKP
VBY18P/LVFCKN
VBY19N/LVF3P
VBY19P/LVF3N

LVF4P
LVF4N

2

MST7410DY
U30

AJ29
AH24
AG23
AJ26
AH23
AJ23
AG29
AG28
AG18
AH17
AJ18
AJ17
AH29
AH28

AJ13
AJ12
AH12
AH11
AH10
AJ9
AJ8
AJ7

D3
D4
E4
E5
F6
D6
E6
F7

AG27
AG26
AH26
AG25
AH25
AG24

AB27

AE29
AF29
AD28
AD27
AC27
AD29
AB28
AC28

AH20
AG20

AJ25
AJ24

AJ6
AA26

D5

AA29
AB29

AE31
AD32
AD31
AE32

D7
D8

E8
E7

AJ20
AH19

AG19
AH18

AL10
AM10

AA28 RESET

XOUT
XIN

I2CS_SDA
I2CS_SCL

I2SM_SDA
I2CM_SCL

GPIO0/UART2_TX
GPIO1/UART2_RX

GPIO2/UART1_TX
CHIP_VDET

SPI_CSZ
SPI_SCK
SPI_SDI
SPI_SDO

INT_R21/HDMIRX_5VDET
INT_R20/3D_FLAG

IRE/UART1_RX

TESTPIN
GND_EFUSE

NC_1
NC_2

VSYNC_LIKE_SPI2/I2C_HSC_SDA
VSYNC_LIKE_SPI3/I2C_HSC_SCL

SPI1_CK/PWM2
SPI1_DI/PWM3
SPI2_CK/PWM0
SPI2_DI/PWM1

SPI3_CK/DIM10
SPI3_DI/DIM11
SPI4_CK/DIM8
SPI4_DI/DIM9

VSYNC_LIKE/PWM5

DIM0
DIM1
DIM2
DIM3
DIM4
DIM5

GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO48
GPIO49
GPIO50

GPIO18
GPIO19

HDMI1_RXSCL/GPIO20
HDMI1_RXSDA/GPIO21
HDMI1_RXHPD/GPIO22
HDMI1_RXCEC/GPIO23
HDMI0_TXCEC/GPIO24
HDMI0_TXHPD/GPIO25

HDMI2_RXSCL/GPIO4
HDMI2_RXSDA/GPIO5
HDMI0_RXSCL/GPIO6
HDMI0_RXSDA/GPIO7
HDMI0_RXCEC/GPIO8
HDMI0_RXHPD/GPIO9

HDMI2_RXCEC/GPIO10
HDMI2_RXHPD/GPIO11
RXHTPDN_OSD/GPIO12
RXHTPDN_VID/GPIO13
HDMI1_TXCEC/GPIO14
RXLOCKN_OSD/GPIO15
RXLOCKN_VID/GPIO16
HDMI1_TXHPD/GPIO17

3

U30
MST7410DY

AM31
AL32
AK30
AL31
AK29
AL30
AM29
AL29
AF27
AF28

AL9
AM9
AL8
AK9
AL7
AK8
AK7
AM7
AJ11
AJ10

AF31
AF32
AG30
AG31
AJ32
AH31
AK31
AJ31

AM5
AL6
AK5
AL5
AK4
AL4
AM2
AM3

AL2
AL1
AK2
AL3
AJ2
AK3
AJ3
AJ1 HDMI0_RXCP

HDMI0_RXCN
HDMI0_RX0P
HDMI0_RX0N
HDMI0_RX1P
HDMI0_RX1N
HDMI0_RX2P
HDMI0_RX2N

HDMI1_RXCP
HDMI1_RXCN
HDMI1_RX0P
HDMI1_RX0N
HDMI1_RX1P
HDMI1_RX1N
HDMI1_RX2P
HDMI1_RX2N

HDMI2_RXCP
HDMI2_RXCN
HDMI2_RX0P
HDMI2_RX0N
HDMI2_RX1P
HDMI2_RX1N
HDMI2_RX2P
HDMI2_RX2N

HDMI0_TXSCL
HDMI0_TXSDA
HDMI0_TXCP
HDMI0_TXCN
HDMI0_TX0P
HDMI0_TX0N
HDMI0_TX1P
HDMI0_TX1N
HDMI0_TX2P
HDMI0_TX2N

HDMI1_TXSCL
HDMI1_TXSDA
HDMI1_TXCP
HDMI1_TXCN
HDMI1_TX0P
HDMI1_TX0N
HDMI1_TX1P
HDMI1_TX1N
HDMI1_TX2P
HDMI1_TX2N

5

<YOUR NAME HERE>

17mb100-r1

25-12-2014_16:44

1 1

87654321

A

B

C

D

E

F

AX M

1 2 3 4 5 6 7 8

A

B

C

D

E

F

A3PROJECT NAME :VESTEL
SCH NAME :

DRAWN BY :

T. SHT:

G
6
_
L
B
3
P
/
V
_
H
T
P
D

G
6
_
L
B
4
N
/
O
S
D
_
L
O
C
K

G
6
_
L
B
4
P
/
O
S
D
_
H
T
P
D

TX_V5P/LA4P
TX_V5N/LA4N
TX_V4P/LA3P
TX_V4N/LA3N
TX_V3P/LACLKP
TX_V3N/LACLKN
TX_V2P/LA2P
TX_V2N/LA2N
TX_V1P/LA1P
TX_V1N/LA1N
TX_V0P/LA0P
TX_V0N/LA0N

TP64

100R
R239

MFC_MSDA
MFC_MSCL

X4

24MHz

3

14

2 1
M

R
7
2
5

S112

S113

50V
22p

C1428

C1429

22p
50V

C1430

22p 50V

50V22p

C1431

SYS_SDA

SYS_SCL

R103
1k

TP76
TP77

MFC_SPI_SCZ
MFC_SPI_SCK
MFC_SPI_SDI
MFC_SPI_SDO

10R
R793

1
2
3
4 5

6
7
8R1

R2
R3
R4

33R
R299

T
P
7
8

1

4
k
7

R
4
8

3D_SYNC_O

SPI_SDI_BS
SPI_SCL_BS

22R
R342

R343
22R

HSYNC_BS22R
R344

22R
R345

BACKLIGHT_DIM_MFC

R1001
22R

R421
10k VDDP_MFC9

VDDP_MFC9
VDDP_MFC9
VDDP_MFC910k

R422

R423
10k

10k
R424

R425
10k

MFC_RESET

4
k
7

R
4
7

10V

100n

C1751

MFC_SPI_SDI
MFC_SPI_SCK

D17

1N5819

MFC_SPI_SCZ

MFC_SPI_SDO1
0
k

R
4
1
9

3V3_VCC

TP65

TP66
TP67

TP68

S114
MFC_SDA
MFC_SCL

S115

TP69
TP70

T
P
7
1

TP72

TP731

R
4
2
0

1
0
k

M
F
C
_
S
P
I
_
W
P

S116

S117

MFC_MSCL

MFC_MSDA

R
7
9
4

4
k
7

4
k
7

R
7
9
5

TP74 1

TP75 1

MFC_LB3N/LOCK

MFC_LB3P/HTPD

VBY1_15N/LF1P
VBY1_15P/LF1N

VBY1_14P/LF0N
VBY1_14N/LF0P

VBY1_13N/LE4P
VBY1_13P/LE4N

VBY1_12P/LE3N
VBY1_12N/LE3P

VBY1_11N/LECLKP
VBY1_11P/LECLKN

VBY1_10N/LE2P
VBY1_10P/LE2N

TX_LB4P

3D_SYNC

22R
R1002

TP273

TP96
TP97
TP98
TP99

TP100
TP101

TP102

VDDP_MFC9

SPI_XCS_BS
SPI_SDO_BS

TX_LB4N
TX_LB3P/HTPD
TX_LB3N/LOCK
TX_LBCLKP
TX_LBCLKN
TX_LB2P
TX_LB2N
TX_V7P/LB1P
TX_V7N/LB1N

TX_V6P/LB0P
TX_V6N/LB0N

1
0
k

R
8
9
8

2
1

R
8
9
9
1
0
k

2
1

3
V
3
_
V
C
C

3
V
3
_
V
C
C

22R
R1003

VSYNC_BS

10k
R1004

100n
C2353

C2354
100n

100n
C2355

C2356
100n

C2357
100n

100n
C2358

C2359
100n

100n
C2360

C2361
100n

100n
C2362

C2363
100n

100n
C2364

C2365
100n

100n
C2366

100n
C2367

C2368
100n

S304
S305

S306
S307

S308
S309

S310
S311

TX_V0N/LA0N
TX_V0P/LA0P

TX_V1N/LA1N
TX_V1P/LA1P

TX_V2N/LA2N
TX_V2P/LA2P

TX_V3N/LACLKN
TX_V3P/LACLKP

TX_V4N/LA3N
TX_V4P/LA3P

TX_V5N/LA4N
TX_V5P/LA4P

TX_V6N/LB0N
TX_V6P/LB0P

TX_V7N/LB1N
TX_V7P/LB1P

VDDP_MFC9

TX_LB2N
TX_LB2P

TX_LBCLKN
TX_LBCLKP

TX_LB3N/LOCK
TX_LB3P/HTPD

TX_LB4N
TX_LB4P

VBY1_9P/LE1N
VBY1_9N/LE1P
VBY1_8P/LE0N
VBY1_8N/LE0P

C2329
100n

100n
C2330

C2331
100n

VDDP_MFC910k
R1005

100n
C2332

HSYNC_BS

VSYNC_BS

SPI_SDI_BS

SPI_SCL_BS

SPI_XCS_BS

SPI_SDO_BS

10V
C2390
100nF 100nF

C2391
10V

10k
R1006

2 1VDDP_MFC9

R1007
10k

2 1

VDDP_MFC9 R1008
10k2 1

R1009
10k2 1

CN64

8

7

6

5

4

3

2

1

10V
C2392

100nF
10V
C2393

100nF

22R
R1028

100nF
C2394

10V

100nF
C2395

10V

100nF
C2408

10V

C2333
100n

100n
C2334

100n
C2335

C2336
100n

100n
C2337

C2338
100n

100n
C2339

C2340
100n

C2341
100n

100n
C2342

100n
C2343

100n
C2344

100n
C2345

C2346
100n

100n
C2347

C2348
100n

100n
C2349

C2350
100n

100n
C2351

C2352
100n

100n
C1752

C1753
100n

100n
C1754

C1755
100n

100n
C1756

C1757
100n

100n
C1758

C1759
100n

C1760
100n

100n
C1761

C1762
100n

100n
C1763

100n
C1764

C1765
100n

100n
C1766

C1767
100n

CN72
1
2
3

NC
NC
NC
NC
NC
NC
NC
NC

NC
NC
NC
NC
NC
NC
NC
NC

NC
NC
NC
NC
NC
NC
NC
NC

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

NC

NC
NC
NC
NC
NC
NC
NC

NC
NC

NC
NC

NC

NC
NC

NC

MFC I2C DEBUG CONN.

MFC SERIAL FLASH (4MB)

bottom olacak

NC

nc

LOCAL DIM /BACKLIGHT SCANNING

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC

Near to VIA2

NC

TEST POINTS

Ferrite for LVDS / 100n fr VBy1

Ferrite for LVDS / 100n fr VBy1

Similer Documents